1. Field of the Invention
The present invention relates to a method and apparatus for increasing the memory read/write speed by using special function registers (SFR) in the processor. With this method, built-in of an internal ICE and the slowing down of read/write operation during debugging due to the use of an external ICE can be eliminated.
2. Description of Related Arts
The role of the SFR in the 8051 single-chip processor is vitally important. The SFR is a 128-byte region in the memory that can be directly addressed by internal registers. The register address in the range 80H˜FFH is for saving the control status and data of various special functions and peripherals, for example, break points, serial ports, clock/timer, etc. All these control registers and data must first be set in the SFR according to their predetermined values.
To test and debug the functions of a new product using the registers in the SFR in the product development stage, the developer often has to built-in an internal ICE in the product. However, the preparation of an internal ICE often requires considerable human and material resources to develop the related software, firmware and hardware. Among the methods that can reduce the resource commitment, the idea of an extended memory instruction (using MOVX) seems to be viable. The debug program employs an 8051 processor that supports the ICE operation mode. Its internal registers are disabled and the pins for PORT0, PORT2, ALE, PSEN, RESET, and CLK are connected to the corresponding pins on an external ICE in the debugging operation. Though debugging can be accomplished using this method with no internal ICE and the commitment of resources can be reduced, the read/write performance is quite poor.
The poor read/write performance is mainly due to the longer machine cycle required for execution of an extended read/write instruction as compared with an internal instruction. In the normal mode, reading from or writing to the internal registers only requires an internal instruction (MOV) with one machine cycle; whereas the equivalent read/write operation with extended memory instruction (using MOVX) needs two machine cycles. Also, during the execution of an MOVX instruction, an accumulator (ACC) is needed for address computation before writing back to the original register, thereby slowing down the read/write speed. Furthermore, if a read/write operation is performed on other registers (for Ri or DPTR), their addresses have to be assigned before using them. The program size is therefore quite large. These extended read/write instructions cannot meet the fast read/write requirement.
The present invention provides a debugging method that is easy to use on a processor and still maintains satisfactory read/write performance.